====================
  SimplIC3 CREDITS
====================

SimplIC3 is based on ideas (and code) from the following sources. Unless
otherwise specified, Alberto Griggio <griggio@fbk.eu> is the author of
everything else. See the LICENSE.txt file for copyright notices and licensing
information.


* And-Inverter Graphs
---------------------

The Aiger library is used as a front-end for parsing models in AIGER format.
Aiger can be found at http://fmv.jku.at/aiger/

The copyright/license of Aiger is the following:

   Copyright (c) 2006 - 2011, Armin Biere, Johannes Kepler University.
   
   Permission is hereby granted, free of charge, to any person obtaining a
   copy of this software and associated documentation files (the "Software"),
   to deal in the Software without restriction, including without limitation
   the rights to use, copy, modify, merge, publish, distribute, sublicense,
   and/or sell copies of the Software, and to permit persons to whom the
   Software is furnished to do so, subject to the following conditions:
   
   The above copyright notice and this permission notice shall be included in
   all copies or substantial portions of the Software.
   
   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
   THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   DEALINGS IN THE SOFTWARE.
   

The Aig library used internally implements the local 2-level rewriting rules
described in the paper:

  R. Brummayer, A. Biere. Local Two-Level And-Inverter Graph Minimization
  without Blowup. In Proc. 2nd Doctoral Workshop on Mathematical and
  Engineering Methods in Computer Science (MEMICS'06), Mikulov, Czechia,
  October 2006.

The algoritm for converting from Aig to CNF based on logic synthesis is
described in the paper:

  Niklas En, Alan Mishchenko, Niklas Srensson: Applying Logic Synthesis for
  Speeding Up SAT. SAT 2007: 272-286

The implementation is based on the one of the ABC model checker. ABC can be
found at http://www.eecs.berkeley.edu/~alanmi/abc/abc.htm

The copyright/license of ABC is the following:

   ABC: System for Sequential Synthesis and Verification
   
   http://www.eecs.berkeley.edu/~alanmi/abc/
   
   Copyright (c) The Regents of the University of California. All rights
   reserved.
   
   Permission is hereby granted, without written agreement and without license
   or royalty fees, to use, copy, modify, and distribute this software and its
   documentation for any purpose, provided that the above copyright notice and
   the following two paragraphs appear in all copies of this software.
   
   IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
   DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
   OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
   OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   
   THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
   AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON
   AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
   PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.


* SAT solving
-------------

SimplIC3 implements an abstract SAT solver interface which allows multiple
backends to be plugged in easily. Currently it comes with two backeds, for
MiniSat (the default) and Picosat.

MiniSat can be found at: http://www.minisat.se/

Picosat can be found at: http://fmv.jku.at/picosat/


* IC3
-----

IC3 was first described in the paper:

   Aaron R. Bradley: SAT-Based Model Checking without Unrolling. VMCAI 2011:
   70-87

The implementation in SimplIC3 mostly follows the pseudo-code described in the
paper:

   Niklas En, Alan Mishchenko, Robert K. Brayton: Efficient implementation of
   property directed reachability. FMCAD 2011: 125-134

The generalization of CTIs (counterexamples to induction) using unsatisfiable
cores (instead of ternary simulation), as well as the strategy for
generalizing blocked cubes (using variable activities for deciding which
literals to drop) follows the implementation in the Tip model checker. Tip can
be found at https://github.com/niklasso/tip

The copyright/license of Tip is the following:

   Copyright (c) 2011, Niklas Sorensson, Koen Claessen
   
   Permission is hereby granted, free of charge, to any person obtaining a
   copy of this software and associated documentation files (the "Software"),
   to deal in the Software without restriction, including without limitation
   the rights to use, copy, modify, merge, publish, distribute, sublicense,
   and/or sell copies of the Software, and to permit persons to whom the
   Software is furnished to do so, subject to the following conditions:
   
   The above copyright notice and this permission notice shall be included in
   all copies or substantial portions of the Software.
   
   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
   AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   DEALINGS IN THE SOFTWARE.

Also the idea of unrolling the property for a few cycles is taken from Tip.

The extraction of clauses from CTGs (counterexamples to generalization)
follows the procedure described in the paper:

   Zyad Hassan, Aaron Bradley and Fabio Somenzi: Better Generalization in
   IC3. FMCAD 2013


* Abstract IC3
--------------

IC3 with lazy abstraction is described in the paper:

   Yakir Vizel, Orna Grumberg, Sharon Shoham: Lazy abstraction and SAT-based
   reachability in hardware model checking. FMCAD 2012: 173-181


* K-Induction
-------------

The implementation of K-induction uses the "lazy" introduction of simple path
constraints, as described in the paper:

   Niklas En, Niklas Srensson: Temporal induction by incremental SAT
   solving. Electr. Notes Theor. Comput. Sci. 89(4): 543-560 (2003)


* Preprocessing
---------------

Model simplification with temporal decomposition and equivalence extraction is
based on the procedure implemented in Tip.
